1. Field of the Invention
The invention relates to a calibration circuit for reducing a respective calibration error of a first calibration signal for a pull-down driver and a second calibration signal for a pull-up driver of a driver control circuit for controlling N input/output drivers of an integrated circuit and to such a driver control circuit.
2. Description of the Prior Art
The technical field of the invention relates to the transmission of signals from a microchip to other components or microchips by means of output lines or microchip output lines. An individual microchip has a multiplicity of output lines. The signals that are transmitted via the output line of the microchip are driven by means of an input/output driver (I/O driver). In order to minimize or to avoid the reflection of transmitted signal energy on an output line, thus reducing or avoiding noise on the output line, the output resistance of the input/output drivers is to be matched to the resistance of the output lines. Since the output resistance of the input/output drivers is subject to severe fluctuations both on account of the production tolerances and on account of the respective operating conditions, regulating the output resistance of the input/output driver to the resistance of the output line is a difficult technical problem of regulation. Since the input/output drivers on a microchip are subject to the same production conditions, an individual driver control circuit suffices for controlling all the input/output drivers of said microchip in such a way that the output resistance of the input/output drivers is in each case matched to the resistance of the corresponding output line.
In regard to this, FIG. 1 shows a schematic block diagram of a microchip with a known driver control circuit for controlling the input/output drivers. A microchip MC has a multiplicity of input/output drivers EAT. Without restricting the generality, two input/output drivers EAT-1, EAT-2 are illustrated in FIG. 1. The input/output driver EAT-1 is connected to the microchip output line MCA-1 on the output side, so that signals transmitted on the microchip output line MCA-1 are driven by the input/output driver EAT-1. On the input side, the input/output driver EAT-1 is connected to a multiplicity of driver input lines TE. Without restricting the generality, four driver input lines TE-1, . . . , TE-4 are illustrated in FIG. 1. The driver input lines TE-1, . . . , TE-4 are coupled to the calibration circuit output lines KSA-1, . . . , KSA-4 of a driver control circuit TSS. For controlling the input/output drivers EAT, the driver control circuit TSS transmits a control signal to the output/input drivers EAT. By way of example, the control signal for the input/output driver EAT-1 is transmitted via the calibration circuit output line KSA-1, . . . , KSA-4 and via the driver input lines TE-1, . . . , TE-4. According to the example shown in FIG. 1, the control signal is formed by four control bits, namely the first control bit b1, the second control bit b2, the third control bit b3 and the fourth control bit b4. By way of example, the first control bit b1 is transmitted via the calibration circuit output line KS-1 and the driver input line TE-1 to the input/output driver EAT-1 and to the input/output driver EAT-2.
FIG. 2 shows a schematic block diagram of the known driver control circuit TSS for generating a control signal SS for the input/output drivers EAT. The driver control circuit TSS has an input/output driver EAT, the properties of which correspond to those of the input/output drivers that are provided at the edge of the microchip MC and are connected to the microchip output lines MCA. The output resistance of the input/output driver EAT of the driver control circuit TSS cannot be matched to the resistance of the output lines MCA in continuous steps, but rather only in discrete steps by means of the four control bits b1, . . . , b4. The above will be explained by means of a detailed circuit analysis:
The driver control circuit TSS has an external resistor W-2 having a resistance value Z corresponding to the resistance value of the microchip output line MCA.
After the external resistor W-2 has been connected up to the input/output driver EAT via a first node KN-1 between a supply voltage VS and earth, the input/output driver EAT is used as a pull-down driver. In order that the input/output drivers EAT connected to the output lines of the microchip are also provided with a control signal for their pull-up drivers, a second driver control circuit TSS with a further external resistor W-2 is necessary (not shown). The regulation voltage RS can be tapped off at the first node KN-1, which voltage is to be regulated to half a supply voltage VS/2. If the regulation voltage RS has the value of half the supply voltage VS/2, then the output resistance of the input/output driver is equal to the external resistor W-2, and the regulation aim is fulfilled.
Details will now be given about regulating the regulation voltage RS to half the supply voltage VS-2 in order to set the output resistance of the input/output driver of the driver control circuit TSS to the resistance value Z of the external resistor W-2.
Half the supply voltage VS/2 is provided at a second node KN-2 by means of a voltage divider ST. The voltage divider ST comprises a series circuit of two first resistors W-1 having identical first resistance values R1. The second node KN-2 serves for tapping off half the supply voltage VS/2 between the two first resistors W-1.
The driver control circuit TSS furthermore has a comparator K. The comparator K receives half the supply voltage VS/2 and the regulation voltage RS on the input side. The comparator K compares the regulation voltage RS with half the supply voltage VS/2. The result of this comparison is a voltage difference ΔV.
The voltage divider ST, the comparator K, the external resistor W-2 and the input/output driver of the driver control circuit TSS form a calibration circuit KS. The output resistance of the input/output driver EAT is set by means of the calibration circuit KS.
For this purpose, the calibration circuit KS receives a regulating signal form a control signal generating circuit SSG. According to the example in accordance with FIG. 2, the regulating signal is formed by four control bits, namely the first control bit b1, the second control bit b2, the third control bit b3 and the fourth control bit b4.
On the input side, the control signal generating circuit SSG receives the voltage difference ΔV and generates therefrom a control signal SS for the input/output drivers connected to the output lines of the microchip, and the regulating signal for the calibration circuit KS.
The control signal generating circuit SSG has an automatic state machine ZA, a detection circuit DS and a storage device S. The automatic state machine ZA internally manages a number of 2n different states. A state corresponds to a regulating signal for the output resistance of the input/output driver EAT of the driver control circuit TSS. According to the example in accordance with FIG. 2, the automatic state machine has 24 different states and accordingly four output lines on which the first control bit b1, the second control bit b2, the third control bit b3 and the fourth control bit b4 are transmitted on the one hand to the calibration circuit KS as regulating signal and on the other hand to the storage device S.
The respective present state, formed by the four control bits b1, b2, b3, b4 is buffer-stored in the storage device S.
The detection circuit DS receives the voltage difference ΔV on the input side. Depending on the voltage difference ΔV, the detection circuit DS detects the settled state of the regulation. The settled state of the regulation is achieved when the sign of the voltage difference ΔV changes alternately. Thus, if the settled state has been reached, the detection circuit DS transmits a selection signal AS to the storage device S and enables the presently stored state in the storage device S in order to be transmitted as control signal SS to the input/output drivers of the microchip as pull-down control signal.
The following problems arise in the case of the known driver control circuit TSS. A respective driver control circuit TSS with an external resistor W-2 is to be provided for the pull-up drivers and for the pull-down drivers. External resistors are very expensive to use on account of their space requirement and the packing complexity within the circuit, the high accuracy required and the additional installation outlay. Moreover, the inaccuracy of the regulation is high on account of the discrete steps for setting the output resistance for the input/output driver EAT of the driver control circuit TSS.
In order to elucidate this problem area, FIG. 3 illustrates a schematic diagram showing the regulation error F produced by the known driver control circuit. Let us assume that the automatic state machine ZA has 24=16 internal states, as illustrated in FIG. 2, and the resistance value Z has a value of between 20Ω and 80Ω. The range in which the resistance value Z of the microchip output line fluctuates is 60Ω in this example. With the 16 steps of the automatic state machine ZA in accordance with FIG. 2, a resistance step ΔR of 3.75Ω results (cf. equation (I)).
                              Δ          ⁢                                          ⁢          R                =                                            60              ⁢                                                          ⁢              Ω                                      2              n                                =                                                    60                ⁢                                                                  ⁢                Ω                                            2                4                                      =                          3.75              ⁢                                                          ⁢              Ω                                                          (        I        )            
On account of this resistance step ΔR and this resistance range for the external resistance value Z, this results in a maximum regulation error Fmax of:
                              F          ⁢                                          ⁢          max                =                                            3.75              ⁢                                                          ⁢              Ω                                                      50                ⁢                                                                  ⁢                Ω                            ⁢                                                                            =                      7.5            ⁢                                                  ⁢            %                                              (        II        )            
The regulation error F is very high and noise on the output lines on account of the reflection of the transmitted signal energy can be reduced only to a very limited extent.